About Me
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Namaste!
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Welcome to my minimalist homepage. My name is Sridhar Madan Mareguddi and I am currently living in Austin, Texas.
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I am, and have always been, a curious person. I have always strived to understand the World, and I have a very broad range of interests. I like to observe, think, dream and solve real-world problems. My ceaselessly active geeky-mind made me a coder, engineer, interaction designer and artist. Self-exploration and desire to evangelize technology has kept me on the shores of tinkering, blogging, entrepreneurship and exciting experiences. Sci-fi movies, painting and books inspire me, but nature inspires me the most. I create technology that is unobtrusive and natural to use. As an artist, I create Interactive installations depicting our connection with nature.
My adventure with technology began when I first learnt how to make a tiny LED glow as a kid. Since then I have been building smart systems with a focus on design, pervasiveness and solving real-world problems.
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Sridhar Madan
Firmware Engineer
Graduate with 6+ yrs of Industry Experience
Phone:
+1 979-900-0622
Email:
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EXPERIENCE
March 2018 - Present
Staff Firmware Engineer
Advanced Micro Devices
• Developing dynamic power management algorithms and firmware prototyping for future AMD products
• Analyzing power/performance for server, client processors and GPUs
May 2015-March 2018
Senior Firmware Engineer
DellEMC
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Developed systems management firmware for Integrated Dell Remote Access Controller (iDRAC) with Lifecycle Controller, a remote enablement controller for 14th generation Dell PowerEdge servers.
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Developed Out Of Band management interface to collect system inventory data for Embedded Health Report(EHR)
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Implemeted Dell Function Server (DFS) APIs that provide interface to register consumer functions by utlizing Dell’s ZeroMQ library for Remote Procedure Calls
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Converted iDRAC Linux Program/Daemons to Non-root for securer server management system
Sept 2014-Dec 2014
Product Development Co-op Engineer
Advanced Micro Devices
• Experienced in silicon bring-up, debug, and validation of DFT features on ATE (Verigy 93k)
• Automated composite pattern generation and verification flow for JTAG.
Jun 2014-Aug 2018
Member Technical Staff Intern
Chelsio Communications
• Developed scripts to analyse the candidates for fusion that merges multiple operations into a single-cycle instruction using TIE, a hybrid language of Verilog and C used to specify designer-defined extensions to Cadence Xtensa LX3 microprocessor
• Evaluated the firmware used for the embedded processor targeted at the Chelsio's T5 network adapter
• Achieved reduction in firmware code size, instruction issue bandwidth resulting in significant performance improvement.
Jan 2013-July 2013
Senior Product Engineer
Cypress Semiconductor
• Experienced in automating bench characterization systems using NI LabVIEW for Cypress's Programmable SoC.
• Worked on AC/DC parametric tests and statistical data analysis to ensure fitness for volume production and tracked corrective actions
• Characterized key components in analog and digital architecture like opamps, comparators, DACs, IOs,Timer, Counter, Bandgap and chip level parameters on Programmable system on chip(PSoC)
Aug 2010-Jan 2013
Software Engineer
Cypress Semiconductor
• Created test projects for automated functional tests for different components of PSoC1 (M8C), PSoC3 (8051), PSoC4A (ARM Cortex-M0) and PSoC5 (ARM Cortex-M3) microcontrollers
• Improved functionality of Bootloader and CyBoot by providing enhancements and eliminating major bugs
• Investigated the architecture of the mixed-signal PSoC, Capacitive-touch Sensing Controllers and USB Controllers
• Created test projects for testing iPod Accessory Protocol (IAP) – Made For iPod/iPad/iPhone (MFi) Solutions which provides an interface for accessory developers to communicate apple device with their accessories
• Automated regression testing, test script development and test framework maintenance for ‘PSoC Creator’ and ‘PSoC Designer’, device configuration IDEs used to develop embedded applications
• Investigated low-power modes of operation and power optimization techniques in PSoC3 and PSoC5 in collaboration with Research and Development team
• Familiar with high speed test equipment (Scopes, Bus Analyzers, Protocol analyzers)
EDUCATION
2013-2015
MS in Computer Engineering
Texas A&M University, College Station, Texas
Digital VLSI, Computer Architecture and Embedded Systems.
2006-2010
BE in Electronics & Communication Engineering
Visvesvaraya Technological University,India
Electronics and Communication
PROJECTS
Custom design of an 8-bit pipelined adder with buffered H-Tree clock circuitry